The subject matter disclosed herein relates generally to integrated circuits. More specifically, the disclosure provided herein relates to a semiconductor structure including a high-k buried oxide (BOX) layer.
In conventional silicon-on-insulator (SOI) wafer processing, the buried-oxide (BOX) layer normally includes silicon dioxide. However, during reactive ion etching, severe silicon dioxide BOX loss and undercut is observed. This can lead to device shorts, patterning difficulty due to the degraded topography, and yield degradation. There are also problems with the back-gate to channel electrical coupling.